Most of the commands you use to update files are similar; to build most C++ programs, you call g++ with similar flags and really just change the name of the file you're compiling.
Make allows you to define suffix rules. In the sample, there's one which tells it how to build a .o file from a .cc file:
.cc.o: -> $(CXX) $(CXXFLAGS) -c $<
With suffix rules, you can leave out the command part of a dependency rule, for example:
usepix.o: usepix.cc usepix.h pixmap.h
If make decides to update usepix.o, it sees from this line that it depends on usepix.cc, and it sees from the .cc.o rule that to update it, it should run g++ using the flags defined in CXXFLAGS to compile usepix.cc. In fact, the command it executes turns out to be:
$(CXX) $(CXXFLAGS)................................. -c $< g++ -g -I. -I/home/garrett/Projects/Tapestry/lib -c usepix.cc
In fact, make is so smart that you don't even need to tell it what usepix.o depends on (although it is a good idea). Once it figures out that the file usepix.cc exists, it assumes that usepix.o depends upon it and applies the suffix rule accordingly.
Make also has a number of built in suffix rules, which are roughly as follows:
.c.o: -> $(CC) -c $(CPPFLAGS) $(CFLAGS) -o $@ $< .cc.o: -> $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) -o $@ $< .o : -> $(CC) $(LDFLAGS) $^ -o $@ $(LOADLIBES)
The .SUFFIXES: .cc line tells make to apply suffix rules only to .cc files and is not absolutely necessary.